1、培訓(xùn)過(guò)程中，如有部分內(nèi)容理解不透或消化不好，可免費(fèi)在以后培訓(xùn)班中重聽(tīng)；
        2、課程完成后,授課老師留給學(xué)員手機(jī)和Email,保障培訓(xùn)效果,免費(fèi)提供半年的技術(shù)支持。
        3、培訓(xùn)合格學(xué)員可享受免費(fèi)推薦就業(yè)機(jī)會(huì)。

第一階段

高速PCB設(shè)計(jì)中的理論基礎(chǔ)

傳輸線理論、信號(hào)完整性（反射、串?dāng)_、過(guò)沖、地彈、振鈴等）、電磁兼容性和時(shí)序匹配等等。

2 SPECCTRAQuest設(shè)計(jì)流程

2.1 Pre-Placement

2.2 Board Setup Requirements for Extracting and Applying Topologies

2.3 Database Setup Advisor

—Cross-Section

—DC Nets

—DC Voltages

—Device Setup . ??—SI Models

—SI Audit

3 拓?fù)浣Y(jié)構(gòu)的抽取與仿真 Extracting and Simulating Topologies

3.1 Pre-Route Extraction Setup—Default Model Selection.

3.2 Pre-Route Extraction Setup—Unrouted Interconnect

3.3 Pre-Route Template Extraction

3.4 SQ Signal Explorer Expert

3.5 Analysis Preferences

3.6 SigWave

3.7 Delay Measurements

第二階段

4 確定和施加約束 Determining and Adding ConstraintsSolution

4.1 Solution SpaceAnalysis: Step 1 to 6

4.2 Parametric Sweeps.

4.3 Constraints :

Topology Template Constraints

Switch/Settle Constraints

Assigning the Prop Delay Constraints

Impedance Constraint

Relative Propagation Delay Constraint

Diff Pair Constraints

Max Parallel Constraint

Wiring Constraint

User-Defined Constraint

Signal Integrity Constraints

4.4 Usage of Constraints Defined in Topology Template

5 模板應(yīng)用和基于約束的布局

Template Applications and Constraint-Driven Placement

5.1 Creating a Topology

5.2 Wiring the Topology

5.3 TLines and Trace Models

5.4 Coupled Traces

5.5 RLGC Matrix of Coupled Trace Models

5.6 Crosstalk Simulation in SQ Signal Explorer Expert

5.7 Simulating with Coupled-Trace Models

5.8 Sweep Simulation Results with Coupled-Trace Models

5.9 Extracting a Topology Using the Constraint Manager

5.10 Electrical Constraint Set

5.11 Applying Electrical CSet

5.12 Worksheet Analysis

5.13 Spacing and Physical Rule Sets

5.14 Electrical Rule Set

第三階段

6 基于約束的布線 Constraint-Driven Routing

6.1 Manual Routing

6.2 Routing with the SPECCTRA Smart Route

6.3 Driving Constraints in Routing

7 布線后的DRC檢查和分析 Post-Route DRC and Analysis

7.1 Post-Route Analysis

7.2 SigNoise

7.3 Reflection Simulation

7.4 Reflection Waveform Analysis

7.5 Comprehensive Simulation

7.6 Crosstalk Simulation

7.7 Crosstalk Analysis

7.8 Simultaneous Switching Noise Simulation

7.9 SSN Waveform Analysis

7.10 System-Level Analysis

7.11 A Complete Design Link

7.12 Initialize Design Link

8 差分信號(hào)設(shè)計(jì) Differential Pair Design Exploration

8.1 Types of Differential Pairs in SPECCTRAQuest

8.2 Create Differential Pair Using SPECCTRAQuest

8.3 Create Differential Pair Using Constraint Manager

8.4 Assigning Differential Pair Signal Models

8.5 Preference to Extract Unrouted Differential Pair Topology

8.6 Extracting Unrouted Differential Pair Topology

8.7 Custom Stimulus to Analyze Differential Pair Topology

8.8 Differential Pair Topology Analysis

8.9 Coupled Trace Model and Differential Pair Topology

8.10 Layout Cross-section Editor

8.11 Differential Pair Constraints

8.12 Differential Pair Constraints in the Constraint Manager

8.13 Differential Pair Analysis in the Constraint Manager

8.14 Post Route Extraction

9 時(shí)序仿真和和PI仿真

9.1 時(shí)序仿真

9.2 PI仿真

第四階段

10. 多板仿真和Design Link模型

10.1 Design Link模型的創(chuàng)建和修改

10.2 主板和子板，底板和核心板的接口信息的查找和顯示

10.3 多板仿真建模

10.4 多板仿真主板和子板資源添加和接口連接

10.5 網(wǎng)絡(luò)列表創(chuàng)建

10.6 仿真參數(shù)設(shè)置

10.7 探測(cè)仿真

11. SI仿真環(huán)境的建立和時(shí)序仿真－－DDR3和Flash,高速數(shù)據(jù)線的時(shí)序控制

11.1 SI仿真模型的查找技巧和IBIS格式轉(zhuǎn)換

11.2 仿真環(huán)境的設(shè)置和仿真模型分配和審核

11.3 DDR3和Flash,高速數(shù)據(jù)線時(shí)序仿真在項(xiàng)目開(kāi)發(fā)中作用和意義

11.4 時(shí)序控制的公式推導(dǎo)和理論基礎(chǔ)

11.5 對(duì)應(yīng) Setup Time和 Hold Time 公式的深入理解

11.6 公式參數(shù)在芯片datasheet中的查找

11.7 時(shí)序仿真的高速數(shù)據(jù)線等網(wǎng)絡(luò)組的創(chuàng)建和拓?fù)涮崛?/p>

11.8 時(shí)序仿真的激勵(lì)

11.9 時(shí)序仿真類型

11.10 時(shí)序仿真結(jié)果查看

11.11 時(shí)序仿真的約束

11.12 SigXplore和Constraint Manager

11.13 設(shè)計(jì)規(guī)則應(yīng)用和規(guī)則驅(qū)動(dòng)布局

12. 差分仿真

12.1 差分線仿真模型

12.2 差分線定義

12.3 差分線仿真設(shè)計(jì)技巧

12.4 如何在Constraint Manager中識(shí)別和查找差分對(duì)

12.5 如何建立差分對(duì)

12.5 差分對(duì)拓?fù)涮崛『头抡?/p>

12.6 SigXplore中差分線約束

12.7 差分約束更新到約束管理器

13.PI電源完整性仿真

13.1 電源平面對(duì)的耦合和去耦

13.2 電源仿真的環(huán)境搭建

13.3 阻抗控制和層疊結(jié)構(gòu)設(shè)計(jì)

13.4 電源平面對(duì)構(gòu)建中各種復(fù)雜情況的考慮和處理原則

13.5 PI電源完整性仿真參數(shù)設(shè)置

13.5 EMI/EMI 處理

13.6 電壓調(diào)節(jié)模塊和噪聲源

13.7 仿真中電容的選取

13.8 多節(jié)點(diǎn)仿真

13.9 波形圖的處理

14. 后仿真－布線后分析

14.1 反射仿真

14.2 串?dāng)_仿真

14.3 同步開(kāi)關(guān)噪聲仿真

14.4 寄生仿真

14.5 EMI仿真

14.6 振鈴仿真

15. 自動(dòng)和手動(dòng)布線的技巧

15.1 自動(dòng)布線技巧

15.2 手動(dòng)布線技巧